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datasheet tle 6216 v7.1 page 1 of 17 18.10.02 smart quad channel low-side switch features product summary low on-resistance 2 x 0.2 , 2 x 0.35 (typ.) power - so 20 - package with integrated cooling area overload shutdown selective thermal shutdown status monitoring overvoltage protection shorted circuit protection standby mode with low current consumption c compatible input electrostatic discharge (esd) protection application all kinds of resistive and inductive loads (relays, electromagnetic valves) c compatible power switch for 12 and 24 v applications solenoid control switch in automotive and industrial control systems general description quad channel low-side-switch (2x5a/2x3a) in smart power technology (spt) with four separate in- puts and four open drain dmos output stages. the tle 6216 is fully protected by embedded protec- tion functions and designed for automotive and industrial applications. block diagram supply voltage v s 4.8 - 32 v drain source voltage v ds(az)max 60 v on resistance r on(typ) 1,2 0.2 r on(typ) 3,4 0.35 output current i d 1,2 2 x 5 a i d 3,4 2 x 3 a p-dso-20-12 output stage gate control logic st1 st2 4 gnd vs st3 1 4 in1 in2 in3 in4 out1 o ut4 stby v bb as ch. 1 as ch. 1 as ch. 1 gnd normal function scb / overload overtemperature as st 1 as st 1 as st 1 st4 ena cross open load / short to gnd
datasheet tle 6216 v7.1 page 2 of 17 18.10.02 pin configuration (top view) pin description pin symbol function 1 gnd ground 2 out1 power output channel 1 3 st1 status output channel 1 4 in4 control input channel 4 5 vs supply voltage 6 stby standby 7 in3 control input channel 3 8 st2 status output channel 2 9 out2 power output channel 2 10 gnd ground 11 gnd ground 12 out3 power output channel 3 13 st3 status output channel 3 14 in2 control input channel 2 15 gnd ground logic 16 ena enable input for all four channels 17 in1 control input channel 1 18 st4 status output channel 4 19 out4 power output channel 4 20 gnd ground heat slug internally connected to ground pins p - dso - 20 - 12
datasheet tle 6216 v7.1 page 3 of 17 18.10.02 detailed block diagram vs logic logic out1 out4 st4 in4 st1 in1 ena open load overload open load overload overtemperature channel 1 overtemperature channel 4 logic logic out2 out3 gnd st3 in3 st2 in2 open load overload open load overload stby internal supply rpd rpd rpd rpd overtemperature channel 2 overtemperature channel 3
datasheet tle 6216 v7.1 page 4 of 17 18.10.02 block diagram of open load detection
datasheet tle 6216 v7.1 page 5 of 17 18.10.02 maximum ratings for t j = ? 40c to 150c parameter symbol values unit supply voltage v s -0.3 ... + 40 v supply voltage operational range v s + 4.8 ... + 32 v continuous drain source voltage (out1...out4) v ds 40 v input voltage in1 to in4, ena i i <|10| ma v in , v ena - 0.3 ... + 6 -1.5?+6 v input voltage stby v stby - 0.3 ... + 40 v status output voltage v st - 0.3 ... + 32 v operating temperature range during clamping; t = 30 min during clamping; t = 15 min storage temperature range t j t j t j t stg - 40 ... + 150 175 190 - 55 ... + 150 c output current per channel i d(lim) overload shutdown a output current at reversal supply i d 1,2 i d 3,4 - 4 - 2 a status output current i st - 5 ... + 5 ma inductive load switch off dissipation energy t j = 25c e as 50 mj e lectro s tatic d ischarge voltage (hbm) according to mil std 883d, method 3015.7 and eos/esd assn. standard s5.1 ? 1993 output 1-4 pins all other pins v esd v esd 4000 2000 v v thermal resistance junction - case r thjc 2k/w maximum operating lifetime (according to "ambient thermal conditions") t b 10000 h ambient thermal conditions t ambient temperature range operating periods -40 c 2 % -20 c 10 % 25 c 24 % 60 c 34 % 80 c 24 % 100 c 5 % > 120 c 1 %
datasheet tle 6216 v7.1 page 6 of 17 18.10.02 electrical characteristics parameter and conditions symbol values unit v s = 4.8 to 18 v ; t j = - 40 c to + 150 c (unless otherwise specified) min typ max 1. power supply (v s ) supply current (outputs on) i s 8ma supply current (outputs off) v ena = l, v stby = h i s 4ma operating voltage v s 4.8 32 v standby current v stby = l i s 10 a 2. power outputs on state resistance channel 1,2 t j = 25 c i d = 1a; v s 9.5 v t j = 125c 1 t j = 150c 2 r ds(on) 0.2 0.5 0.5 on state resistance channel 3,4 t j = 25 c i d = 1a; v s 9.5 v t j = 125c 1 t j = 150c 2 r ds(on) 0.35 0.75 0.75 z-diode clamping voltage (out1...4) i d 100 ma v ds(az) 45 60 v pull down resistor t j = 25 c v stby = h, v in = l t j = -40 c ...150c r pd 14 10 20 26 40 k output leakage current v stby = l t j = -40c...150c wafer test at 25c i dlk 5 1 a a output on delay time 3 i d = 1 a output off delay time 3 i d = 1 a output on fall time 3 i d = 1 a output off rise time 3 i d = 1 a output off status delay time 3 i d = 1 a output on status delay time 4 overload switch-off delay time t on t off t fall t rise t 4 t 5 t dso 0 5 5 5 10 50 5 100 25 40 50 50 60 50 300 s 3. digital inputs (in1, in2, in3, in4, ena) input low voltage v inl - 0.3 1.0 v input high voltage v inh 2.0 6.0 v input voltage hysteresis 4 v inhys 50 100 mv input pull down current v in = 5 v; v s 6.5 v i in 10 30 60 a enable pull down current v ena = 5 v; v s 6.5 v i ena 10 20 40 a 4. digital status outputs (st1 - st4) open drain output voltage low i st = 2 ma v stl 0.5 v leakage current high i sth 2a 1 measured on p-dso-20 devices 2 measured on chip, bond wires not included 3 see timing diagram, resitive load condition; v s 9 v 4 this parameter will not be tested but assured by design
datasheet tle 6216 v7.1 page 7 of 17 18.10.02 electrical characteristics parameter and conditions symbol values unit v s = 4.8 to 18 v ; t j = ? 40 c to + 150 c (unless otherwise specified) min typ max 5. standby input (stby) input low voltage v stby 01v input high voltage v stby 3.5 v s v input current v stby = 18 v i stby 300 a 6. diagnostic functions open load detection voltage v s 6.5 v v ena = x, v in = l, v dc = 0 5 v ds(ol) 0.525 0.575 *v s open load compare voltage v s 6.5 v v ena = x, v in = l, 18v v dsc v ds(ol) 5 v ds(ol)c v dsc -1.5 v dsc -1.0 v open load current channel 1,2 v s 6.5 v v ena = h, v in = h i d(ol) 1,2 160 480 ma open load current channel 3,4 v s 6.5 v v ena = h, v in = h i d(ol) 3,4 160 480 ma overload threshold current channel 1,2 v s 6.5 v i d(lim) 1,2 57.5 a overload threshold current channel 3,4 v s 6.5 v i d(lim) 3,4 35 a overtemperature shutdown threshold 6 hysteresis t th t hys 170 10 200 c k table 1: channel compared with channel v ds(ol) 14 v ds(ol) 23 v ds(ol) 32 v ds(ol) 41 5 v dsc is the output voltage of the corresponding channel, paired for open load detection corresponding outputs are channel 1 and 4, channel 2 and 3 (see table 1). 6 this parameter will not be tested but assured by design
datasheet tle 6216 v7.1 page 8 of 17 18.10.02 application description this ic is especially designed to drive inducti ve loads (relays, electromagnetic valves). integrated clamp-diodes limit the output voltage when inductive loads are discharged. four open-drain logic outputs indicate the status of the integrated circuit. the following conditions are monitored and signaled: - overloading of output (also shorted load to supply) in active mode - open and shorted load to ground in active and inactive mode - overtemperature circuit description input circuits the control and enable inputs, both active high, consist of schmitt triggers with hysteresis. all inputs are connected with pull-down current sources. not connected inputs are interpreted as low. in standby mode (stby = low) the current consumption is greatly reduced. the circuit is active when stby = high. if the standby function is not used, it is allowed to connect the standby pin directly to v s . switching stages the four power outputs consist of dmos-power transistors with open drains. the output stages are shorted loads protected throughout the operating range. integrated clamp-diodes limit voltage over- shoots produced when inductive loads are demagnetized. parallel to the dmos transistors there are internal pull down resistors. they are provided to detect an open load condition in the off state. they will be disconnected in the standby mode. protective circuits the outputs are protected against current overload and overtemperature. there is no protection against reverse polarity of the supply voltage. error detection the status outputs indicate the switching state under normal conditions (low = off; high = on). if an error occurs, the logic level of the status output is inverted, as listed in the diagnostic table below. the state of the error detection circuits is directly dependent on the input status. if current overload or overtemperature occurs, the error condition is stored into an internal register and the output is shutdown. the reset is done by switching off the corresponding control input. open load is detected for all four channels in on and off mode. in the on mode the load current is monitored. if it drops below the specified threshold value, then an open load condition is detected.
datasheet tle 6216 v7.1 page 9 of 17 18.10.02 in the off mode, the output voltage is monitored. an open load condition is detected when the output voltage of a given channel is below 55 % of the supply voltage v s . also the output voltages of two outputs are compared against each other in off con- dition with a fixed offset of typ. 1.25 v to recognize gnd bypasses. to suppress fault diagnosis during the flyback phase of the compared output, the diagnostic circuit includes a latch function. reset of this latch is done at end of the flyback phase, additionally it can be reset by a low signal on the enable input or a high signal of the input line. see block diagram of open load detection on page 4. diagnostic table in general the status follows the input signal in normal operating conditions. if any error is detected the status is inverted. operating condition standby input enable input control input power output status output stby ena in out st standby l x x off h normal function h h h h l l h h l h l h off off off on l l l h open load or short to ground h h h h l l h h l h l h off off off on h h h l overload or short to supply latched overload reset latch h h h h h h l x h h h h l off off off off l l h l overtemperature latched overtemperature reset latch h h h h h h l x h h h h l off off off off l l h l
datasheet tle 6216 v7.1 page 10 of 17 18.10.02 diagnostic (continued) the following diagrams show the dynamical behavior of the status output in case of different errors. the symbol f defines the moment of failure occurrence. output open load or short circuit to gnd f f in st output overload f f in st overtemperature of the chip f f in st load bypass f f in st
datasheet tle 6216 v7.1 page 11 of 17 18.10.02 test circuit out 1 out 2 out 3 out 3 v s gnd tle 6216 st1 st2 st3 st4 in1 in2 in3 in4 stby ena 1000f 470nf 10k 10k 10k 10k
datasheet tle 6216 v7.1 page 12 of 17 18.10.02 application circuit out 1 gnd out 2 out 3 out 4 v s 5v tle 6216 st1 in1 stby 1000f 470nf 10k 10k 10k 10k status outputs control inputs enable input st2 st3 st4 in2 in3 in4 ena the blocking capacitor c is recommended to avoid critical negative voltage spikes on vs in case of battery interruption during off-commutation.
datasheet tle 6216 v7.1 page 13 of 17 18.10.02 timing diagrams output slope v v inh v t v ds t v st 85% 15% t fall t on t rise t 4 t t 5 v s inl in t off overload switch off delay i d i d(lim) i d(ol) t v st t t dso
datasheet tle 6216 v7.1 page 14 of 17 18.10.02 ordering code type ordering code package tle6216 g on request p - dso - 20 ? 12 tle6216 c on request bare dice on wafer pad assignment out1 out4 pgnd4 pgnd1 st4 st1 in4 vs st2 in3 stby in1 ena gnd in2 st3 out3 out2 pgnd3 pgnd2 tle 6216
datasheet tle 6216 v7.1 page 15 of 17 18.10.02 package dimensions all dimensions in mm 0.1 8 1.3 1.2 -0.3 15.9 +/-0.15 a 2.8 8 8 8 6.3 11 +/-0.15 1) 14.2 +/-0.3 110 11 20 pin 1 index marking 1 x 45 13.7 -0.2 9 x = 11.43 1.27 1.27 0.25 a m 0.4 +0.13 3.2 +/-0.1 5.9 + /-0 .1 15.74 +/- 0.1
datasheet tle 6216 v7.1 page 16 of 17 18.10.02 revision list: 01.09.2001 target datasheet v1 01.11.2001 first revision v3 04.03.2002 second revision v4 30.04.2002 third revision v5 30.07.2002 preliminary datasheet v6 09.09.2002 final datasheet v7 18.10.02 update typers v7.1
datasheet tle 6216 v7.1 page 17 of 17 18.10.02 published by infineon technologies ag , bereich kommunikation st.-martin-strasse 76, d-81541 mnchen ? infineon technologies ag 1999 all rights reserved. attention please! the information herein is given to describe certain com ponents and shall not be considered as warranted characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. infineon technologies is an approved cecc manufacturer. information for further information on technology, delivery terms and condi tions and prices please contac t your nearest infineon tech- nologies office in germany or our infineon technol ogies representatives worldwide (see address list). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support dev ices or systems with the express written approval of infineon technologies, if a failure of such components can reas onably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. life s upport devices or systems are in- tended to be implanted in the human body, or to support and/or main tain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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